Display devices having active matrix substrates that are provided with a switching element for each pixel have been widely used. Active matrix substrates having thin film transistors (hereinafter “TFTs”) as switching elements are called TFT substrates. Note that in the present specification, a portion of a TFT substrate that corresponds to a pixel of the display device may also be called a pixel.
In recent years, it has been proposed to use an oxide semiconductor, instead of amorphous silicon or polycrystalline silicon, as the material of an active layer of a TFT. Such a TFT is called an “oxide semiconductor TFT”. An oxide semiconductor has a higher mobility than amorphous silicon. Therefore, an oxide semiconductor TFT is capable of operating at a higher speed than an amorphous silicon TFT. Moreover, since an oxide semiconductor film is formed by a process that is simpler than a polycrystalline silicon film, it can be applied to apparatuses that require a large area.
A TFT substrate using an oxide semiconductor TFT typically includes an oxide semiconductor TFT (hereinafter abbreviated simply as “TFT”), an interlayer insulating film covering the TFT, and a pixel electrode electrically connected to the drain electrode of the TFT. The source and drain electrodes of the TFT are formed from a metal film, for example. The pixel electrode is normally provided on the interlayer insulating film, and is connected to the drain electrode of the TFT in a contact hole formed in the interlayer insulating film.
On the other hand, a configuration in which the pixel electrode is arranged so as to be in direct contact with an oxide semiconductor layer of the TFT is proposed in Patent Document No. 1. FIG. 23 is a cross-sectional view illustrating a TFT substrate 2000 disclosed in Patent Document No. 1. The TFT substrate 2000 includes a substrate 921, a TFT supported on the substrate 921, an interlayer insulating film (flattening layer) 926 covering the TFT, and a pixel electrode 928. The TFT includes a gate electrode 922, a gate insulating layer 923, an oxide semiconductor layer 924 and a source electrode 925s. The source electrode 925s is formed from a metal film having a layered structure, and is arranged so as to be in contact with the upper surface of the oxide semiconductor layer 924. The pixel electrode 928 is provided on the interlayer insulating film 926 and in a contact hole 927 formed in the interlayer insulating film 926, and is in direct contact with the oxide semiconductor layer 924 in the contact hole 927. That is, a portion of the pixel electrode 928 functions as a drain electrode.
In the present specification, a portion of the oxide semiconductor layer 924 that is in contact with the pixel electrode 928 is called a drain contact region 924ad, a portion thereof that is in contact with the source electrode 925s is called a source contact region, and a portion thereof that is located between the source contact region and the drain contact region 924ad is called a channel region 924ac. A connecting portion that directly connects between the pixel electrode 928 and the oxide semiconductor layer 924 is called a “pixel contact portion”, and the contact hole 927 that is formed in the interlayer insulating film 926 and connects between the pixel electrode 928 and the oxide semiconductor layer 924 is called a “pixel contact hole”.